Electronic memory devices include volatile memory or non-volatile memory. Volatile memory types include dynamic random access memory (DRAM) and static random access memory (SRAM). Non-volatile memory types include reprogrammable memory, such as erasable programmable read only memory (EPROM), electrically erasable programmable read only memory (EEPROM) and FLASH EEPROM memory.
One type of non-volatile, reprogrammable memory known in the art includes magnetic memory cells. These devices, known as magnetic random access memory (MRAM) devices, include an array of magnetic memory cells. The magnetic memory cells may be of different types. For example, the memory cells can be magnetic tunnel junction (MTJ) memory cells or giant magnetoresistive (GMR) memory cells.
Generally, a magnetic memory cell includes a layer of magnetic film in which the orientation of magnetization is alterable and a layer of magnetic film in which the orientation of magnetization may be fixed or “pinned” in a particular direction. The magnetic film having alterable magnetization is referred to as a sense layer or data storage layer and the magnetic film that is fixed is referred to as a reference layer or pinned layer.
Conductive traces referred to as word lines and bit lines are routed across the array of memory cells. Word lines extend along rows of the memory cells, and bit lines extend along columns of the memory cells. A bit of information is stored in a memory cell as an orientation of magnetization in the sense layer at each intersection of a word line and a bit line. The orientation of magnetization in the sense layer aligns along an axis of the sense layer referred to as its easy axis. Magnetic fields are applied to flip the orientation of magnetization in the sense layer along its easy axis to either a parallel or anti-parallel orientation with respect to the orientation of magnetization in the reference layer.
The word lines and bit lines are routed across the array of memory cells for flipping the orientation of magnetization in sense layers. The word lines extend along rows of the memory cells near the sense layers, and the bit lines extend along columns of the memory cells near the reference layers. The word lines and bit lines are electrically coupled to a write circuit.
During a write operation, the write circuit selects one word line and one bit line to change the orientation of magnetization in the sense layer of the memory cell situated at the conductors crossing point. The write circuit supplies write currents to the selected word line and bit line to create magnetic fields in the selected memory cell. The magnetic fields combine to set or switch the orientation of magnetization in the selected memory cell.
The resistance through a memory cell differs according to the parallel or anti-parallel orientation of magnetization of the sense layer and the reference layer. The resistance is highest when the orientation is anti-parallel, which can be referred to as the logic “1” state, and lowest when the orientation is parallel, which can be referred to as the logic “0” state. The resistive state of the memory cell can be determined by sensing the resistance through the memory cell.
In one configuration, word lines and bit lines are used in sensing the resistance through a memory cell. Word lines are electrically coupled to sense layers and bit lines are electrically coupled to reference layers. Word lines and bit lines are also electrically coupled to a read circuit to sense the resistive state of a memory cell.
During a read operation, the read circuit selects one word line and one bit line to sense the resistance through the memory cell situated at the conductors crossing point. In one type of read operation, the read circuit supplies a constant sense voltage across the selected memory cell to generate a sense current through the memory cell. The sense current through the memory cell is proportional to the resistance through the memory cell and is used to differentiate a high resistive state from a low resistive state.
Although a magnetic memory is generally reliable, failures can occur that affect the ability of memory cells to store data. Failures can result from many causes including manufacturing imperfections, internal effects such as noise during a read operation, environmental effects such as temperature and surrounding electromagnetic noise, and aging of the magnetic memory due to use. A memory cell affected by a failure can become unusable, such that no logical value can be read from the memory cell or the logical value read from the memory cell is not necessarily the same as the logical value written to the memory cell. The storage capacity and reliability of the magnetic memory can be severely affected and in the worst case the entire magnetic memory becomes unusable.
Some improvements have been made in manufacturing processes and magnetic memory construction to reduce the number of manufacturing failures and improve magnetic memory longevity. However, the improvements usually involve increased manufacturing costs and complexity, and reduced circuit yields. Hence, techniques are being developed that respond to failures and reduce loss of capacity.